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A list of all the posts and pages found on the site. For you robots out there, there is an XML version available for digesting as well.
Pages
Posts
projects
CryptoPUF
Strong PUFs fall to machine learning. Crypto cores resist ML but have no intrinsic key. Put them together and each one’s weakness is the other’s strength.
EdgeScope
Existing DSE tools model the accelerator in isolation. Spend your area budget on that advice and you can buy a bigger array for a workload that was never compute-bound.
FlexPosit
Mixed-precision quantization gives you rich tradeoffs in software, then wrecks the regular dataflow accelerators depend on. FlexPosit gets both.
LiteAIR5
Traditional edge AI hardware either isn’t fast enough or costs too much power and area. A third option needs tooling that sees the whole system.
Membrane
Analytical queries read enormous amounts of data and discard most of it. Better to discard it before it crosses the bus.
Edge-MPQ
Layer-wise mixed precision beats uniform quantization — but the search has to know what the hardware supports, and the hardware has to actually support it.
publications
Design Space Exploration of Layer-wise Mixed-Precision Quantization with Tightly Integrated Edge Inference Units
Published in Great Lakes Symposium on VLSI (GLSVLSI), 2023
Design space exploration of layer-wise mixed-precision quantization paired with tightly integrated edge inference units.
Recommended citation: X. Zhao, Y. Gao, V. Verma, R. Xu, M. R. Stan, and X. Guo. (2023). "Design Space Exploration of Layer-wise Mixed-Precision Quantization with Tightly Integrated Edge Inference Units." Great Lakes Symposium on VLSI (GLSVLSI).
LiteAIR5: A System-Level Framework for the Design and Modeling of AI-Extended RISC-V Cores
Published in IEEE International System-on-Chip Conference (SOCC), 2023
A system-level framework for designing and modeling RISC-V cores extended with AI acceleration.
Recommended citation: Y. Gao, S. Mosanu, M. N. Sakib, V. Verma, X. Guo, and M. R. Stan. (2023). "LiteAIR5: A System-Level Framework for the Design and Modeling of AI-Extended RISC-V Cores." IEEE International System-on-Chip Conference (SOCC).
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A Feedback Self-Adaptive Body Biasing-Based RF-DC Rectifier for Highly-Sensitive RF Energy Harvesting
Published in IEEE International Symposium on Circuits and Systems (ISCAS), 2024
A self-adaptive body-biasing RF-DC rectifier design for highly sensitive RF energy harvesting.
Recommended citation: J. Yin, E. Pantoja, Y. Gao, and M. R. Stan. (2024). "A Feedback Self-Adaptive Body Biasing-Based RF-DC Rectifier for Highly-Sensitive RF Energy Harvesting." IEEE International Symposium on Circuits and Systems (ISCAS).
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Edge-MPQ: Layer-wise Mixed-Precision Quantization with Tightly Integrated Versatile Inference Units for Edge Computing
Published in IEEE Transactions on Computers, 2024
Layer-wise mixed-precision quantization co-designed with versatile inference units for edge inference.
Recommended citation: X. Zhao, R. Xu, Y. Gao, V. Verma, M. R. Stan, and X. Guo. (2024). "Edge-MPQ: Layer-wise Mixed-Precision Quantization with Tightly Integrated Versatile Inference Units for Edge Computing." IEEE Transactions on Computers.
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CryptoPUF: A Lightweight and ML-Resilient Strong PUF Based on a Weak PUF and Crypto Core
Published in IEEE International Conference on RFID Technology and Applications (RFID-TA), 2024
A lightweight strong PUF construction resilient to machine-learning modeling attacks, built from a weak PUF and a crypto core.
Recommended citation: Y. Gao, J. Chilaka, E. Pantoja, R. Klenke, and M. R. Stan. (2024). "CryptoPUF: A Lightweight and ML-Resilient Strong PUF Based on a Weak PUF and Crypto Core." IEEE International Conference on RFID Technology and Applications (RFID-TA).
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EAS-CiM 2.0: Event-driven Asynchronous Stream-based Compute-in-Memory Kernels with Scalable Precision
Published in IEEE International Symposium on Circuits and Systems (ISCAS), 2025
Event-driven asynchronous stream-based compute-in-memory kernels supporting scalable precision.
Recommended citation: R. Sreekumar, M. Morsali, N. Solomon, Y. Gao, M. Park, K. Lee, et al. (2025). "EAS-CiM 2.0: Event-driven Asynchronous Stream-based Compute-in-Memory Kernels with Scalable Precision." IEEE International Symposium on Circuits and Systems (ISCAS).
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Virtualized Computational RFID (VCRFID) Solution for Industry 4.0 Applications
Published in Electronics, 2025
A virtualized computational RFID platform targeting Industry 4.0 sensing and identification workloads.
Recommended citation: E. Pantoja, Y. Gao, J. Yin, and M. R. Stan. (2025). "Virtualized Computational RFID (VCRFID) Solution for Industry 4.0 Applications." Electronics, 14(12), 2397.
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Membrane: Accelerating Database Analytics with DRAM-Based PIM Filtering and Schema Denormalization
Published in ACM Transactions on Architecture and Code Optimization (TACO), 2025
DRAM-based processing-in-memory filtering combined with schema denormalization to accelerate database analytics.
Recommended citation: A. Shekar, K. Gaffney, M. Prammer, K. Kiyawat, L. Wu, H. Caminal, Z. Fan, Y. Gao, et al. (2025). "Membrane: Accelerating Database Analytics with DRAM-Based PIM Filtering and Schema Denormalization." ACM Transactions on Architecture and Code Optimization (TACO).
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Membrane: Accelerating Database Analytics with DRAM-PIM Filtering
Published in U.S. Patent Application 19/233,680, 2025
U.S. Patent Application 19/233,680.
Recommended citation: K. Skadron, L. Wu, A. Shekar, and Y. Gao. (2025). "Membrane: Accelerating Database Analytics with DRAM-PIM Filtering." U.S. Patent Application 19/233,680.
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FlexPosit: Tunable Fractional Precision for LLM Inference Accelerators
Published in IEEE/ACM International Symposium on Microarchitecture (MICRO), 2026
To appear. Posit-based algorithm-hardware co-design that treats precision as a continuously tunable resource: distribution-aware mixed-precision quantization paired with a unified bit-serial systolic array tunable from 4 to 8 bits at fully regular dataflow.
Recommended citation: Y. Gao, L. Dai, J. Yin, X. Guo, and M. R. Stan. (2026). "FlexPosit: Tunable Fractional Precision for LLM Inference Accelerators." IEEE/ACM International Symposium on Microarchitecture (MICRO). To appear.
